San Jose, California – October 18, 2024 – Rambus, a leading provider of memory and interface technologies, today announced the industry’s first complete memory interface chips for fifth-generation DDR5 RDIMM and next-generation DDR5 Multi-Rank Dual Inline Memory Modules (MRDIMM). These innovative new products for RDIMM and MRDIMMseamlessly extend DDR5 performance, delivering unmatched bandwidth and memory capacity for compute-intensive data center and AI workloads.
Revolutionizing Memory Performance with DDR5 RDIMM 8000 and MRDIMM 12800
The new Rambus chips include:
- Gen5 Registered Clock Driver (RCD), enabling RDIMM to operate at 8000 Megatransfers per second (MT/s).
- MultiplexedRegistered Clock Driver (MRCD) and Multiplexed Data Buffer (MDB), enabling upcoming MRDIMM to operate at up to 12,800 MT/s by doubling the DIMM’s bandwidth beyond the native DRAM device speed.
- Second-generation Server Power Management IC (PMIC5030), specifically designed for DDR5 RDIMM 8000 and MRDIMM 12800, providing ultra-high current at low voltage to support higher speeds and more DRAM and logic chips per module.
The DDR5 RDIMM 8000 and industry-standard MRDIMM 12800 utilize a common architecture, compatible with various server platforms, enabling flexible and scalable end-user server configurations. The DDR5 RDIMM 8000 chipset includes the Gen5 RCD, PMIC5030, Serial Presence Detect (SPD) hub, and Temperature Sensor (TS) chip. The DDR5 MRDIMM 12800 chipset includes the MRCD and MDB, along with the same PMIC5030, SPD Hub, and TS chips as the RDIMM 8000.
MRDIMM 12800: DoublingBandwidth with Multiplexed DRAM
The DDR5 MRDIMM 12800 employs a novel and efficient module design that effectively interleaves two data streams by multiplexing two levels of DRAM, resulting in increased data transfer rates and system performance. This effectively doubles the data transfer rate on the host memory bus compared to native DRAMdevices, boosting bandwidth while using the same physical DDR5 RDIMM connection.
This necessitates an MRCD that can address two levels of DRAM in alternating clock cycles, along with an MDB that directs data streams in and out of the correct DRAM devices. Each DDR5 MRDIMM 12800 requiresone MRCD and ten MDB chips to multiplex the memory channel. The MRCD and MDB will also support four-level DDR5 RDIMM and MRDIMM configurations.
A New Era of Memory Performance for Data Centers and AI
The introduction of Rambus’ DDR5 RDIMM 8000 andMRDIMM 12800 marks a significant leap forward in memory technology, enabling data centers and AI workloads to achieve unprecedented levels of performance and efficiency. These innovative solutions are poised to revolutionize the memory landscape, empowering next-generation computing platforms to tackle the most demanding applications.
References:
*Rambus Website: https://www.rambus.com/
* DDR5 RDIMM and MRDIMM Product Page: https://www.rambus.com/products/memory-interface-chips/
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