San Jose, California – October 18, 2024 – Rambus, a leading provider of memory and interface technologies, today announced the industry’s first complete memory interface chips forfifth-generation DDR5 RDIMM and next-generation DDR5 Multi-Rank Dual In-line Memory Modules (MRDIMM). These innovative new products for RDIMM andMRDIMM will seamlessly extend DDR5 performance, delivering unmatched bandwidth and memory capacity for compute-intensive data centers and AI workloads.
Breaking New Ground with DDR5 RDIMM 8000 and MRDIMM 12800
The new Rambus chips include:
- Gen5 Registered Clock Driver (RCD): Enables RDIMM to operate at speeds up to 8000 MT/s (Megatransfers per second).
- Multiplexed Registered Clock Driver (MRCD) and Multiplexed Data Buffer (MDB): Allow upcoming MRDIMMs to operate at speeds up to 12,800 MT/s by doubling the bandwidth of the DIMM beyond the native DRAM device speed.
- Second-generation Server Power Management IC (PMIC5030): Designed specifically for DDR5 RDIMM 8000 and MRDIMM 12800, delivering ultra-high current at low voltage to support higher speeds and more DRAM and logic chips per module.
The DDR5 RDIMM8000 and industry-standard MRDIMM 12800 utilize a common architecture, ensuring compatibility with various server platforms for flexible and scalable end-user server configurations. The DDR5 RDIMM 8000 chipset includes the Gen5 RCD, PMIC5030,Serial Presence Detect (SPD) hub, and Temperature Sensor (TS) chips. The DDR5 MRDIMM 12800 chipset includes the MRCD and MDB, along with the same PMIC5030, SPD Hub, and TS chips found in the RDIMM 8000.
MRDIMM 12800: Doubling Bandwidth with Multiplexed DRAM
The DDR5 MRDIMM 12800 employs a novel and efficient module design that effectively interleaves two data streams by multiplexing two levels of DRAM, resulting in increased data transfer rates and system performance. Thiseffectively doubles the data transfer rate on the host memory bus compared to native DRAM devices, boosting bandwidth while using the same physical DDR5 RDIMM connection.
This requires an MRCD that can address two levels of DRAM in alternating clock cycles, as well as an MDB that directs data streams in and out of the correct DRAMdevices. Each DDR5 MRDIMM 12800 requires one MRCD and ten MDB chips to multiplex the memory channels. The MRCD and MDB will also support DDR5 MRDIMMs with four levels of DRAM.
Impact on Data Center Performance
The introduction of DDR5 MRDIMMand RDIMM modules with increased bandwidth and memory capacity is a significant leap forward for data center performance. These advancements will enable:
- Accelerated AI and Machine Learning: Higher bandwidth and memory capacity will significantly enhance the performance of AI and machine learning applications, enabling faster training and inference.
- Improved High-Performance Computing(HPC): The increased memory capacity and bandwidth will allow for larger datasets and more complex simulations, leading to breakthroughs in scientific research and engineering.
- Enhanced Cloud Computing: Cloud providers can offer more powerful and scalable services with higher performance and lower latency, improving user experience and driving innovation.
Availability and Future Developments
Rambus is currently working with leading memory and server manufacturers to bring these innovative DDR5 MRDIMM and RDIMM solutions to market. The company expects the first DDR5 MRDIMM 12800 modules to be available in early 2025.
Rambus is committedto continuing its research and development efforts in memory technologies to drive further advancements in data center performance and efficiency.
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Note: This article is based on the provided information and is intended to be factual and informative. It is not intended to be a substitute for professional advice.
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